Description
Hardware & Electrical Specifications
‑ Model: DS200SLCCG1AFG ‑ Part Number: DS200SLCCG1AFG ‑ Module Type: Mark‑V SLCC LAN Communication Daughter‑Board ‑ Mounting: Stack‑on‑SDCC standoff mounting (standoffs & fasteners not included) ‑ Logic Power: +5 VDC, ±15 VDC supplied from SDCC board via KPPL connector ‑ On‑board Processor: LCP LAN control processor ‑ Memory: Dual empty EPROM sockets for firmware; dual‑port RAM for high‑speed data exchange with SDCC ‑ Communication Interfaces: • DLAN: Drive Local Area Network, RS‑422, jumper‑selectable isolated / non‑isolated • ARCNET industrial fieldbus • Local keypad‑display panel interface ‑ Configuration components: Berg‑jumpers for DLAN isolation mode, network termination resistor, processor crystal oscillator configuration (J19) ‑ Connectors: KPPL ribbon‑cable header to SDCC; network signal terminals; keypad‑display port ‑ Diagnostics resources: Multi‑channel status‑LEDs for processor running, network‑link and data‑activity indication ‑ PCB treatment: Industrial conformal‑coated multilayer circuit board (‑AFG revision, optimized clock oscillator thermal performance) ‑ Compatibility note: Exclusively for GE Speedtronic Mark‑V gas‑steam turbine and EX2000 generator‑excitation platforms; NOT drop‑in compatible with Mark‑VI / Mark‑VIe. After replacement, transplant original U6/U7 EPROM firmware chips, copy all jumper‑settings, verify KPPL connector tightness before commissioning drive‑system.
Environmental Specifications
‑ Operating temperature: 0 ℃ ~ +60 ℃ ‑ Storage temperature: −40 ℃ ~ +85 ℃ ‑ Relative humidity: 5%‑95% non‑condensing ‑ Installation location: Indoor drive‑control cabinet, Pollution Degree 2, IP20 ‑ EMC compliance: Industrial EMC requirements for power‑generation excitation‑drive equipment ‑ Certifications: CE, UL compliant for power‑plant control‑system components
Mechanical Data
‑ Board dimension: approx 216 mm × 146 mm ‑ Mounting: Stack‑mount onto SDCC board by plastic standoffs ‑ Weight: approx 0.24 kg
Main Functions
- LAN communication protocol processing LCP processor processes DLAN and ARCNET protocol packets. Bidirectional high‑speed data interaction with SDCC drive‑controller: transmit drive set‑point commands, upload real‑time operating parameters, fault‑alarm and diagnostic information to HMI, local panel and plant DCS. Support jumper‑selectable isolated / non‑isolated RS‑422 DLAN communication to adapt different field noise environments. AFG revision improves clock‑circuit thermal stability for long‑time continuous operation.
- Local keypad‑display interface management Connects local alphanumeric keypad‑display panel, realize on‑site man‑machine operation: parameter browsing, fault diagnosis, local modification of drive‑parameters, status‑text display.
- High‑speed data interaction with SDCC controller Through dual‑port shared RAM, realize real‑time data exchange with host SDCC board. Separates drive closed‑loop calculation task and network communication task, reduces SDCC processor load.
- Communication fault diagnosis & status indication On‑board LED array indicates processor running state, network‑link status and data‑transmission activity. Detect link failure and report network‑fault status word to SDCC. Hardware jumpers configure network termination resistor, DLAN isolation mode and processor crystal‑oscillator circuit.
Installation & Wiring Requirements
- Cut off rack control‑power before installation or replacement. Non‑hot‑swappable. ESD wrist‑strap protection is mandatory during board handling.
- Transfer U6, U7 EPROM firmware chips from original SLCC board onto DS200SLCCG1AFG board. Reproduce jumper‑configuration exactly consistent with original‑board hardware settings (including J19 crystal jumper). Fix SLCC board onto SDCC bracket with standoffs, fasten KPPL ribbon‑cable connector firmly.
- All network‑signal wiring must strictly follow Mark‑V / EX2000 system‑wiring drawings. Reliable protective‑earth connection for control cabinet is mandatory.
- After replacement: Restore rack control‑power. Observe SLCC multi‑channel status‑LEDs. Verify keypad‑display normal display, DLAN / ARCNET link status. Confirm normal data interaction between SDCC, local panel and upper‑level DCS/HMI. Complete communication‑loop verification test before putting drive‑system into service.
- Replacement note: Mismatched EPROM firmware, wrong‑jumper‑configuration or poor KPPL connector contact will cause communication failure, loss of local panel function, cannot upload drive‑operating‑data, may result in drive‑system abnormal‑trip events. Firmware consistency check and full‑communication‑function verification test is mandatory before commissioning.





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