GE IC693CPU351 Single‑Slot High‑Performance CPU Module

Description

Basic Hardware Information

‑ Processor: Intel 80386EX, 25 MHz ‑ Typical scan speed: 0.22 ms / 1K Boolean contacts ‑ User program memory: Max 240 KB (firmware ≥V9.0; older firmware fixed 80 KB) ‑ Memory resources:  ‑ %G:1280 bits; %M:4096 bits; %T:256 bits; %S system status bits  ‑ %R: configurable up to 32640 words; %AI / %AQ configurable up to 32640 words each ‑ Max I/O capacity: %I 2048; %Q 2048; large configurable analog capacity ‑ System rack limit: Max 8 racks total (main + local / remote expansion) ‑ Serial interfaces(total 3):  ‑ Power‑supply connector: SNP‑X slave  ‑ Port1(RJ‑11 RS‑232): SNP‑X master/slave, Modbus‑RTU slave  ‑ Port2(DB‑15 RS‑485): SNP‑X master/slave, Modbus‑RTU slave ‑ Real‑time clock: Yes, lithium‑battery‑backed ‑ Back‑plane loading: 890 mA @5 VDC ‑ Mechanical: Standard single‑slot Series 90‑30 module; weight approx 0.3‑0.4 kg ‑ Operating ambient temperature: 0 ℃ ~ +60 ℃; storage temperature‑40 ℃ ~ +85 ℃; relative humidity 5‑95 % non‑condensing ‑ Handling note: ESD‑sensitive hardware; anti‑static wrist‑strap required during insertion / removal; battery depletion causes RTC‑time and register‑data loss; firmware V9.0‑V9.1 has known serial‑port errata under heavy module‑count conditions ‑ Compatibility: Must install in slot‑1 of IC693CHS391 / IC693CHS397 main‑baseplate; cannot mount on expansion‑only baseplates; compatible with full Series 90‑30 I/O and communication modules; incompatible with Series 90‑70 / RX3i hardware。

Core Functions & Features

1. Executes ladder‑logic, function‑block user program, handles discrete/analog I/O refresh, timer‑counter, arithmetic and firmware‑emulated floating‑point calculation for medium‑complex process‑control applications.
2. Three serial communication channels: front‑panel dual serial ports realize Modbus‑RTU and SNP‑X master‑slave communication, reduces requirement for external communication coprocessor modules; power‑supply‑side SNP‑X port reserved for programming connection.
3. Configurable memory architecture: allocate memory pool for program, registers, analog input/output according to project demands, improves memory‑utilization efficiency for large analog‑signal systems.
4. Supports multi‑rack topology: local parallel expansion via 25‑pin D‑Sub bus, also supports Genius remote‑I/O racks; total up to 8 racks to expand system I/O scale.
5. Flash memory retains user program after power‑loss; lithium backup‑battery preserves real‑time clock and %R register data during power‑off. Front‑panel LED indicators and key‑switch for run‑stop‑reset operation; rich %S system‑status bits provide fault diagnostic information for user logic alarming.
6. Different hardware‑firmware revisions are direct drop‑in replacements; after replacement, download PLC project and hardware‑configuration, verify battery status and serial‑port parameter settings.

On‑site Installation & Commissioning Notes

1. Power‑off complete PLC rack before inserting / removing CPU module. Insert CPU into slot‑1 of CPU‑main baseplate, press fully until locking tab clicks firmly. Verify total 5 VDC back‑plane current consumption of all modules does not exceed power‑supply rating.
2. Local daisy‑chain expansion: IC693ACC307 terminator plug must be installed on D‑Sub port of last expansion rack.
3. Serial‑port wiring: use shielded twisted‑pair for RS‑232/RS‑485; match baud‑rate, parity, station‑address configuration; add bus termination resistor for multi‑drop RS‑485 networks.
4. Download hardware‑configuration and user‑program via programming software; switch CPU to RUN state; monitor %S system‑status bits for fault codes.
5. Periodically inspect CPU backup‑battery; replace battery before depletion to prevent RTC‑time loss and register‑data corruption. Pay attention to firmware errata of V9.0/V9.01 when deploying maximum‑module‑count system.
6. Replacement note: Cannot install on expansion‑only baseplate IC693CHS392 / IC693CHS398. After replacement, verify slot‑1 installation, download project, test local & expansion‑rack I/O, verify all three serial‑port communication channels.